prof. Ing. Karel Vlček, CSc.

prof. Ing. Karel Vlček, CSc.

E-mail: vlcek@utb_cz
Telephone: +420 57-603-5273
Office: U51/810
Prof. Ing. Karel Vlček, CSc.

Activities:

University education and professional career growth:

  • 1971 - BUT Brno, Faculty of Economics; Title: Ing.
  • 1989 - VÚMS and ČVUT, Prague; Title: CSc
  • 1993 - ČVUT Prague; Title: Assoc. Prof. in Telecommunications
  • 2002 - VŠB-TU Ostrava- Professor in Informatics

Employment history:

  • 1971-1982 – TESLA, Rožnov pod Radhoštěm, Integrated Circuits Testing Group; Post: Developer, Author of two patents, co-author one patent (2014)
  • 1982-1990 – TESLA, Valašské Meziříčí, Microprocessor Applications Group; Post: Independent Developer, Author of twenty technical articles in the Biomedical Technology field
  • 1990-1992 –SPŠE in Rožnově pod Radhoštěm; Post: Teacher and author of an innovative studies plan for the Telecommunications specialisation
  • 1992-1997 – Department of Electronics, FEI, VŠB-TU Ostrava-Poruba; Title and Post: Assoc. Prof., Head of Department and Guarantor of the Electronics and Tele-communications
  • 1997-2002 – Department of Measurements and Control Technology; Post: Tutor, Biomedical Engineering specialisation
  • 2002-2004 – Department of Informatics, FEI, VŠB-TU Ostrava; Post: Professor
  • 2004-         – Department of Applied Informatics; (later at the newly-inaugurated Department of Computer and Communication Systems, FAI, TBU in Zlín, (2010); Post: Professor

Internships and study stays:

  • 1994 - BME Hogeschool Gent, Belgium (4 weeks)
  • 1995 - Dortmund, SRN (1 weeks)
  • 1996 - University of Bournemouth, Great Britain (4 weeks)
  • 1996 - BME Hogeschool Gent, Belgium (4 weeks)
  • 1997 - Metropolitan University of Leeds, Great Britain (4 weeks)
  • 1998 - University of Hull, Great Britain (4 weeks)
  • 2002 - University of Helsinki, Finland, (1 week)
  • 2005 - Technical University of Milan, Italy (1 week)

Tuition:

  • Gate Arrays  - Lectures
  • Telecommunication Systems - Lectures
  • Advanced Processor Architectures - Lectures
  • Digital Communications - Lectures

Publications - scripts and monographies:

  1. Vlček, K.: The FPGA Design and Test with VHDL Support. In: Proc. of MUG International Conf. (Oct, 11-12, 1998, Stuttgart, SRN), CD B25007B 980928 IFIP LF31
  2. Vlček, K.: Gate Array Design Advantages of Error-Correcting Turbo-Code Systems, In: Proc. of IFAC PDS, (Programmable Device and Systems Workshop, Elsevier Sci., Ltd., London, February, 14-16, 2006
  3. Vlček, K.: Turbo Code Paradigm and SISO Implementations, In: Proc. of IFAC PDS, (Programmable Device and Systems Workshop, Elsevier Sci., Ltd., London, February, 11-13, 2003), pp. 408-415
  4. Vlček, K.: Compression and Error-Control Coding in Multimedia Communication. BEN Technical Literature Prague (2004), ISBN 80-7300-134-9, (2nd Ed.)
  5. Havel, V., Vlcek, K., Mitrych, J.: Neural Network Architectures for Image Compression. In: IFAC PDS 2004, November, 18-19, 2004, Cracow, Poland, Gliwice, Poland: Silesian Univ. of Tech., 2004, pp. 389-394, 83-908409-8-7
  6. Havel, V., Martinovič, J., Snášel, V., Vlček, K.: Creating Conceptual Lattices using Multilayer Perceptron, CLA 2005, Olomouc, Czech Republic, September, 7-9, 2005), http://cla2005.inf.upol.cz/
  7. Olejník, R., Matyáš, J., Slobodian, P., Vlček, K.: Mikrovlnná anténa s integrovanou funkcí senzoru organických par, Česká republika. Patent, 304850. Registered: 22.10.2014

Scientific and research activities:

  • Processing Numerical Signals, (Information and Coding Theory, Electronic Circuit Design Supported by VHDL, Electronic Circuit Diagnostics and Reliability, Communication Network Design and Their Coding Security. Author of more than 50 professional articles, Editor of International Conference Proceedings: ISBN 80-901751-9-8, ISBN 80-85988-12-7; Defence of a number of projects and university-level textbooks: Information and Coding Theory: ISBN 80-7078-494-6, ISBN 80-7078-614-0; Numerical Integrated Circuit Design – VHDL: ISBN 80-214-1750-1, Electronic Circuit Diagnostics; TEMPUS Equator S_JEP-09468-95

Grant projects:

  • TEMPUS: Very High Speed Integrated Circuits Hardware Description Language (VHDL). BME, Ghent, Belgium (1994). Installed Licences for VHDL; Tuition of the “Design of Hardware Structures with VHDL Support” course
  • TEMPUS: VHDL Retraining, and VHDL-A, BME Ghent, Belgium (1996); Preparation of the CAD Laboratory for ASIC-FPGA Design on workstations
  • TEMPUS: EQUATOR Quality in Electrical and Electronic Circuits, Co-operating Universities: CTU in Prague (Contractor), BUT, Brno, VŠB Tech. Univ. of Ostrava - all in the Czech Republic, Univ. of Hull, Univ. of Leeds, Univ. of Bournemouth – all in Great Britain; Univ. of Grenoble, France. Contribution for FEI, VŠB-TU: 25 persons mobility + laboratory equipment: 4.5 million CZK
  • FRVŠ - MŠMT (1996): Equipping the Transmission Technology Laboratory: 860,000 CZK
  • TEMPUS TETLLIS “International Relations of Universities of West and Middle Europe”, GAČR (1998-2000), Head Resolver: TU Liberec, Co-resolvers: ČVUT Prague, VŠB-TU Ostrava, GAČR (2004-2006), Head Resolver: TU Brno, Co-resolvers: ČVUT Prague, VŠB-TU Ostrava
  • TEMPUS TETLLIS “International Relations of Universities of West and Middle Europe”